CS4204: Concurrency and Multi-Core Architectures
This module is offered in 2020-21.
The aims of this module are:
- To introduce high-level pattern-based approaches to programming multicore systems.
- To explain how high-level patterns patterns link to parallel hardware implementations.
- To provide experience with important parallel models: task and data-parallelism, MIMD and SIMD implementations etc.
On successful completion of this module, the student should:
- Be aware of the need for abstraction in parallel programming.
- Be familiar with a variety of common high-level patterns of parallel programming.
- Have a working knowledge of the implementation of those patterns.
- Understand performance and debugging issues on both CPUs and special-purpose parallel hardware.
- Basic parallel constructs.
- Patterns of parallelism: divide-and-conquer, map-reduce, task farms, pipelines, etc.
- Task and data parallelism.
- Implementation of parallel patterns through concrete skeletons.
- Parallel memory management and other runtime issues.
- Special-purpose hardware: programming SIMD algorithms on GPU hardware.
This module has no compulsory elements beyond those common to all modules (mark of 4 in each assessment component).